Sunday, December 31, 2023
IRC Forth Chatbot
Sunday, January 29, 2023
6507 Graphing Calculator: Forth Virtual Machine
As my last post explains, my goal for 2023 is to finish enough projects to give a presentation at HHC 2023. One of the biggest jobs will be finishing the 6507 Graphing Calculator I've been working on the past few years. The latest stage of the project was rewriting part of the firmware in Forth to save space, which turned out to be a failure.
When I last worked on this project, the firmware had reached 9.3K which well exceeds the calculator's 8K EEPROM. This wasn't so concerning since it seemed plausible at the time to implement a tiny Forth core and shrink the firmware by rewriting parts of it in Forth. Also, some parts of the existing firmware, which is all written in assembly, could be improved to save space. With this plan in mind, I started implementing a preprocessor in Python that scans all of the project's assembly files for Forth code and converts it into bytes to embed in the assembly source code. The Forth core uses token threading so each Forth word in the source produces just one byte rather than two as in direct and indirect threading or three with subroutine threading. The Forth system is initiated with a BRK instruction which jumps to the software interrupt handler and begins interpreting the bytes following the BRK. This saves two bytes for every invocation of the Forth system over using JMP or JSR. One of the tokens in the Forth system is assigned the same number as the BRK op code and increments a counter when executed. A corresponding token at the end of each function decrements the counter and switches from Forth back to assembly when the counter reaches zero. With this setup, the program can jump from assembly or Forth to a function written in Forth and continue executing seamlessly.
Sunday, December 25, 2022
2023 Project Goals
Not much to say here. There just wasn't enough time to get to this one.
Monday, December 19, 2022
PIC32/6502 Blinky Robot
As far as robots go, this is not a very useful one since all it does is blink its eyes every few seconds. The interesting part is how it does the blinking. Rather than switching the LEDs on then delaying a while before switching them off, the robot runs several layers of emulation with the innermost emulated system blinking the LEDs as fast as possible. All the layers of emulators within emulators combine to produce enough overhead to slow the blinking down to a rate that is visible.
Sunday, December 11, 2022
Tali Forth 2 on Linux
Wednesday, December 7, 2022
MIPS Development on Linux

The two main limitations of the Microchip compiler are that it doesn't allow GCC's -O3 level optimizations or compile to the MIPS16e instruction set unless you pay for the full version. The loss of MIPS16e is a real bummer since it saves a lot of program memory by using 16-bit instead of 32-bit instructions like ARM's Thumb instruction set. Microchip claims that programs in this format are 40% smaller without losing much performance which would be great for one of my projects. The standard MIPS GCC has none of these limitations, but it also doesn't come with any headers or other files specific to the PIC32. This got me thinking about how I could combine the two tools and use MIPS GCC on Linux to generate part of the program. Running a few tests shows that Microchip's compiler will accept assembly files written for either the 16-bit or 32-bit instruction set, and the linker will accept object files for either instruction set too. This way, all the chip specific parts of the program like initial setup can be compiled with Microchip's compiler while the bulk of the program can be compiled externally with optimizations and linked in later.
Saturday, July 30, 2022
7400 Logic Calculator: One ROM Design
After finishing the new design for my 7400 Logic Calculator, I continued to think about different ways to build a minimal design that would fit in a calculator body. Watching James Sharman's videos about his breadboard computer got me thinking about eliminating the microcode sequencer ROM, which would save a lot of room. It eventually dawned on me that the ALU ROM could be eliminated too if it was combined with the program ROM. ALU operations then become ROM lookups and can share the same circuitry used for looking up constants which also eliminates chips. Based on this, I came up with a modified design using only 18 chips compared to the other design's 21. Best of all, the whole thing fits into just one 32K EEPROM rather than three.


