Calculator Keypads: Laser Cutter

My last post on building calculator keypads explained all the methods I tried then presented on at the 2023 Hewlett-Packard Handheld Conference. Last year, I bought an Elegoo Phecda Laser Cutter as the next step in building keypads, and the results are really impressive! This particular model uses a laser diode which is much cheaper than other types of lasers like CO2. Common power ratings for diode lasers are 5.5W and 10W although some as low as 1W are used for etching rather than cutting. My laser cutter is a 10W model and also comes in a 20W version that is a lot more expensive. As it turns out, 10W is more than powerful enough for building keypads. Diode lasers like this one have a couple limitations - they don't cut blue material well since it absorbs the laser wavelength and they can't mark or cut harder materials like metal. They also aren't supposed to be able to cut white acrylic but mine punched straight through 3mm of black acrylic and 3mm of white acrylic underneath it.

The first thing to figure out was the software to run the laser. A lot of people swear by LightBurn which is $99 for the license plus an extra yearly fee to access updates. Instead of that, I went with LaserGRBL which is free and works on Windows. Since then, I switched my laptop over to Ubuntu, so LaserGRBL needs to run in a virtual machine. My laser cutter was shipped to my next work destination, so I'll need to wait a few months to test that everything works. Setting up LaserGRBL was really easy. It includes test images for cutting to figure out the ideal number of passes and laser strength to use on a particular piece. For etching images, the default resolution was pretty low, so I changed it to 16 lines per millimeter since the focal size of the laser is 0.06 x 0.06mm. This was enough to get it cutting and etching exactly how I wanted. Generating images for etching was easy using Python to create an SVG then converting to PNG as with my other keypads. The laser's cutting mode uses SVG images directly.

7400 Logic Calculator: One ROM Design - More Ideas

Two years ago, after writing about my ideas for a calculator built from 7400 series logic, I posted a second time about shrinking that from three ROMs to a one-ROM design to save space. Last year, I had more ideas about how to improve the one-ROM design and made a lot of progress on a schematic. Laying everything out showed that there was still a lot to figure out. At that point, I stopped working on the schematic and started working on this blog post but didn't finish. When I came back a few months later, looking back over my notes to remember how the design works inspired me to come up with a separate second design! This posts explains the first design that didn't quite work and the second design that seems to have solved all the pending problems while being much smaller

First Design

The biggest difference in the first design is the register arrangement. Rather than two 74HC670 register file chips driving the address bus of an ALU EEPROM, this design uses two 8-bit latches to drive a single EEPROM used for everything. The two 74HC670s are still on the bus but serve as storage memory rather than driving the EEPROM address directly. The two latches in the new design can each read eight bits from the data bus and drive the address buses of the EEPROM and RAM. This allows data access to those two memories and also serves as the ALU since the single EEPROM fulfills that function as well. This simplifies things a little compared to prior designs since no separate RAM pointer chip is required. Half of each 8-bit latch is connected to the address bus through resistors to act as pull-ups and pull-downs. A separate ALU latch overcomes those values when activated. This allows the two latches to form a 16-bit pointer when the ALU latch is disabled by an instruction and to function as two 4-bit registers when the ALU latch is enabled. One of the big problems to solve in a 4-bit design like this is how to access each nibble of a byte fetched from memory, do calculations on the nibbles, then recombine the nibbles to write them back to memory. This design has the low nibble of one latch and the high nibble of the other latch wired directly to the address bus so those two nibbles are used for ALU operations. This allows access to the high and low nibbles of any byte but also complicates things a bit for instructions like increment or decrement that treat the combined nibbles as a single byte. Another complication is the carry bit which needs to be disabled when not fed to the ALU and annoyingly wastes a whole chip for a single bit.